DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 711

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

SH7201 Group
R01UH0026EJ0300 Rev. 3.00
Sep 24, 2010
Bit
1, 0
Bit Name
CKE[1:0]
Initial
Value
00
R/W
R/W
Description
Clock Enable
Select the SCIF clock source and enable or disable
clock output from the SCK pin. Depending on the
combination of these bits, the SCK pin can be used for
serial clock output or serial clock input. If serial clock
output is set in clocked synchronous mode, the C/A bit
in SCSMR is set to 1, and then these bits are set.
•
00: Internal clock, SCK pin used for input pin (input
01: Internal clock, SCK pin used for clock output
10: External clock, SCK pin used for clock input
11: Setting prohibited
•
00: Internal clock, SCK pin used for serial clock output
01: Internal clock, SCK pin used for serial clock output
10: External clock, SCK pin used for serial clock input
11: Setting prohibited
Asynchronous mode
Clocked synchronous mode
signal is ignored)
(The output clock frequency is 16 times the bit rate.)
(The input clock frequency is 16 times the bit rate.)
Section 16 Serial Communication Interface with FIFO (SCIF)
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