DS72011RB120FPV Renesas Electronics America, DS72011RB120FPV Datasheet - Page 846

• Manufacturer Part Number: DS72011RB120FPV
• Description: IC SH7201 MPU ROMLESS 176LQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of DS72011RB120FPV

• Core Size: 32-Bit
• Core Processor: SH-2A
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, SCI, Serial Sound
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 176-LQFP
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 120MHz
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -20°C To +70°C
• Embedded Interface Type: I2C, SSI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: R0K572011S000BE - KIT STARTER FOR SH7201HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Section 19 Controller Area Network (RCAN-ET)
Table 19.3 Roles of Mailboxes
Page 818 of 1190
MB15 to MB1
MB0
MB0 (reception MB)
MB1 to 15 (MB for transmission/reception)
MB[0].MSG_DATA[0][1]
MB[0].MSG_DATA[2][3]
MB[0].MSG_DATA[4][5]
MB[0].MSG_DATA[6][7]
MB[n].MSG_DATA[0][1]
MB[n].MSG_DATA[2][3]
MB[n].MSG_DATA[4][5]
MB[n].MSG_DATA[6][7]
Notes: 1. All bits shadowed in grey are reserved and the write value should be 0. The value returned by a read may not always be 0 and should not be relied upon.
MB[0].CONTROL1H, L
MB[n].CONTROL1H, L
MB[0].CONTROL0H
MB[n].CONTROL0H
MB[0].CONTROL0L
MB[n].CONTROL0L
Register Name
MB[0].LAFMH
MB[n].LAFMH
Regiter Name
MB[0].LAFML
MB[n].LAFML
2. MBC1 bit in mailbox is fixed to 1.
3. ATX and DART are not supported by mailbox-0, and the MBC setting of mailbox-0 is limited.
4. When the MCR15 bit is 1, the order of STDID, RTR, IDE and EXTID of both message control and LAFM differs from HCAN2.
5. n = 0 to 15 (mailbox number)
H'10A + n
H'10C + n
H'10E + n
H'100 + n
H'102 + n
H'104 + n
H'106 + n
H'108 + n
H'110 + n
Tx
OK
⎯
Address
Address
H'10A
H'10C
H'10E
H'100
H'102
H'104
H'106
H'108
H'110
32
32
32
32
32
32
32
32
32
LAFM
LAFM
IDE_
IDE_
IDE
IDE
15
15
0
0
RTR
RTR
14
14
0
0
0
0
MSG_DATA_0 (first Rx/Tx Byte)
MSG_DATA_0 (first Rx/Tx Byte)
NMC
NMC ATX DART
Figure 19.3 Mailbox-n Structure
13
13
0
0
0
0
MSG_DATA_2
MSG_DATA_4
MSG_DATA_6
MSG_DATA_2
MSG_DATA_4
MSG_DATA_6
12
12
0
11
11
0
10
10
MBC[2:0]
MBC[2:0]
9
9
EXTID_LAFM[15:0]
EXTID_LAFM[15:0]
STDID_LAFM[10:0]
STDID_LAFM[10:0]
EXTID[15:0]
EXTID[15:0]
Data Bus
Data Bus
8
8
STDID[10:0]
STDID[10:0]
7
7
0
0
Byte: 8-bit access, Word: 16-bit access, LW (LongWord): 32-bit access
6
6
0
0
Rx
OK
OK
5
0
5
0
MSG_DATA_1
MSG_DATA_3
MSG_DATA_5
MSG_DATA_7
MSG_DATA_1
MSG_DATA_3
MSG_DATA_5
MSG_DATA_7
4
4
0
0
3
3
DLC[3:0]
DLC[3:0]
2
2
EXTID[17:16]
LAFM[17:16]
EXTID[17:16]
LAFM[17:16]
1
1
EXTID_
EXTID_
R01UH0026EJ0300 Rev. 3.00
0
0
Byte/Word/LW
Byte/Word/LW
Byte/Word/LW
Byte/Word/LW
Access Size
Access Size
Byte/Word
Byte/Word
Byte/Word
Byte/Word
Byte/Word
Byte/Word
Word/LW
Word/LW
Word/LW
Word/LW
Word
Word
Word
Word
SH7201 Group
Sep 24, 2010
Field Name
Field Name
Control 0
Control 1
Control 0
Control 1
LAFM
LAFM
Data
Data