HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 592

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 17 Serial Communication Interface (SCI)
Serial Data Reception (Clock Synchronous Mode):
Figure 17.21 shows a sample flow chart for serial data reception. After enabling the SCI
transmission, transmit serial data following the procedure shown below:
When switching from the asynchronous mode to the clock synchronous mode, make sure that
ORER, PER, and FER are cleared to 0. If PER or FER is set to 1, the RDRF bit will not be set and
both transmitting and receiving will be disabled.
Rev.6.00 Mar. 27, 2009 Page 534 of 1036
REJ09B0254-0600
No
No
Read receive data in SCRDR and
clear RDRF bit in SCSSR to 0
Clear RE bit in SCSCR to 0
Read ORER bit in SCSSR
Read RDRF bit in SCSSR
All data received?
Start reception
End reception
ORER = 1?
RDRF = 1?
Figure 17.21 Sample Serial Reception Flowchart (1)
No
Yes
Yes
Error processing
Yes
(2)
(3)
(1)
(1) Receive error processing:
(2) SCI status check and receive
(3) To continue receiving serial
If a receive error occurs, read
the ORER bit in SCSSR to
identify the error. After
executing the necessary error
processing, clear ORER to 0.
Transmitting/receiving cannot
resume if ORER remains set
to 1.
data read:
Read the serial status register
(SCSSR), check that RDRF is
set to 1, then read receive
data from the receive data
register (SCRDR) and clear
RDRF to 0. The RXI interrupt
can also be used to determine
if the RDRF bit has changed
from 0 to 1.
data:
Read SCRDR, and clear
RDRF to 0 before the frame
MSB (bit 7) of the current
frame is received.

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