HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 706
HD6417727BP160CV
Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP160CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Section 20 Serial IO (SIOF)
20.3.9
Figures 20.13 to 20.19 show examples of serial transmit or receive of SIOF.
(1) A Case of 8 bits Monaural (No.1)
Sync pulse method, falling edge sampling, transmit data and receive data are assigned to slot No.
0, frame length is 8 bits.
(2) A Case of 8 bits Monaural (No.2)
Sync pulse method, falling edge sampling, transmit data and receive data are assigned to slot No.0,
frame length is 16 bits.
Rev.6.00 Mar. 27, 2009 Page 648 of 1036
REJ09B0254-0600
Setting: TRMD = 00 or 10, REDG = 0,
Setting: TRMD = 00 or 10, REDG = 0,
Transmit or Receive Timing
TDLE = 1,
RDLE = 1,
CD0E = 1,
TDLE = 1,
RDLE = 1,
CD0E = 0,
Figure 20.13 Transmit or Receive Timing (8 bits monaural—1)
Figure 20.14 Transmit or Receive Timing (8 bits monaural—2)
SCK_SIO
SIOFSYNC
TXD_SIO
RXD_SIO
SCK_SIO
SIOFSYNC
TXD_SIO
RXD_SIO
TDLA3 to TDLA0 = 0000,
RDLA3 to RDLA0 = 0000,
CD0A3 to CD0A0 = 0000,
TDLA3 to TDLA0 = 0000,
RDLA3 to RDLA0 = 0000,
CD0A3 to CD0A0 = 0000,
1 bit delay
Lch. DATA
Slot No.0
1 bit delay
Lch. DATA
Slot No.0
1 frame
1 frame
FL = 0000 (frame length 16 bits),
TDRE = 0,
RDRE = 0,
CD1E = 0,
FL = 0100 (frame length 16 bits),
TDRE = 0,
RDRE = 0,
CD1E = 0,
Slot No.1
TDRA3 to TDRA0 = 0000,
RDRA3 to RDRA0 = 0000,
CD1A3 to CD1A0 = 0000
TDRA3 to TDRA0 = 0000,
RDRA3 to RDRA0 = 0000,
CD1A3 to CD1A0 = 0000
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