HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 856
HD6417727BP160CV
Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP160CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Section 25 LCD Controller
1. The PALEN bit in the LCDC color palette register is 0 (initial value); normal display operation
2. Access LDPALCR and set the PALEN bit to 1; enter color-palette setting mode
3. Access LDPALCR and confirm that the PALS bit is 1.
4. Access LDPR00 to LDPRFF and write the required values to the PALD00 to PALDFF bits.
5. Access LDPALCR and clear the PALEN bit to 0; return to normal display mode
0 is output on the LCDC display data output (LCDD) while the controller is in color palette setting
mode.
PALDnn color and gradation data should be set as above, using 256-gradation values for R, G, B,
and M.
For a color display, PALDnn [23:16], PALDnn [15:8], and PALDnn [7:0] respectively hold the R,
G, and B data. Although the bits PALDnn [18:16], PALDnn [9:8], and PALDnn [2:0] exist, no
memory is associated with these bits. PALDnn [18:16], PALDnn [9:8], and PALDnn [2:0] are
thus not available for storing palette data. The numbers of valid bits are thus R: 5, G: 6, and B:
5.24-bit (R: 8 bits, G: 8 bits, and B: 8 bits) data should, however, be written to the palette-data
registers. When the values for PALDnn [23:19], PALDnn [15:10], or PALDnn [7:3] are not 0, 1s
should be written to PALDnn [18:16], PALDnn [9:8], or PALDnn [2:0], respectively. When the
values of PALDnn [23:19], PALDnn [15:10], or PALDnn [7:3] are 0, 0 should be written to
PALDnn [18:16], PALDnn [9:8], or PALDnn [2:0], respectively. Then 24 bits are extended.
Grayscale data for a monochromatic display should be set in PALDnn [7:3]. PALDnn [23:8] are
all ‘don’t care’. When the value in PALDnn [7:3] is not 0, 1s should be written to PALDnn [2:0].
When the value in PALDnn [7:3] is 0, 0s should be written to PALDnn [2:0]. Then 8 bits are
extended.
Rev.6.00 Mar. 27, 2009 Page 798 of 1036
REJ09B0254-0600
Color
Monochrome
31
Figure 25.3 Color-Palette Data Format
R7
23
R6
R5
R4
R3
R2
R1
R0
G7
15
G6
G5
G4
G3
G2
G1
G0
M7
B7
7
M6
B6
M5
B5
M4
B4
M3
B3
M2
B2
M1
B1
M0
B0
0
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