HD6417727F100CV Renesas Electronics America, HD6417727F100CV Datasheet - Page 771

• Manufacturer Part Number: HD6417727F100CV
• Description: SH3-DSP, LEAD FREE
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP Exposed Pad, 240-eQFP, 240-HQFP
• Cpu Family: SuperH
• Device Core Size: 32b
• Frequency (max): 100MHz
• Interface Type: SCI/USB
• Program Memory Size: Not Required
• Total Internal Ram Size: 16KB
• # I/os (max): 104
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 2.05/3.6V
• Operating Supply Voltage (min): 1.6/2.6V
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 240
• Package Type: HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

23.6.4
EP1 has two 64-byte FIFOs, but the user can perform data reception and receive-data reads
without being aware of this dual-FIFO configuration.
When one FIFO is full after reception is completed, the USBIFR0/EP1 FULL bit is set. After the
first receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty,
and so the next packet can be received immediately. When both FIFOs are full, NACK is returned
EP1 Bulk-Out Transfer (Dual FIFOs)
bit automatically cleared to 0
USBIFR0/EP1 FULL status
USBIFR0/EP1 FULL status
Data reception from host
bit automatically set to 1
OUT token reception
USB function
in EP1 FIFO?
Both FIFOs
are empty?
Space
Figure 23.10 EP1 Bulk-Out Transfer Operation
Yes
Yes
ACK
NACK
No
No
Interrupt request
Interrupt request
Rev.6.00 Mar. 27, 2009 Page 713 of 1036
Read USBEP1 receive-data
Write 1 to EP1 read-end bit
data register (USBEPDR1)
(USBTRG/EP1 RDFN = 1)
size register (USBEPSZ1)
Section 23 USB Function Controller
Read data from USBEP1
Application
REJ09B0254-0600