HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1029
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
29.3.3
PCC0CSCR is an 8-bit readable/writable able register. PCC0CSCR bits are set to 1 by interrupt
sources of the PC card connected to area 6 (only bit 7 can be set to 1 as required). PCC0CSCR is
initialized by a power-on reset but retains its value in a manual reset and in software standby
mode.
A common interrupt vector (PCCI) is assigned to each interrupt source.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7
6
5
Bit Name
P0SCDI
⎯
P0IREQ
Area 6 Card Status Change Register (PCC0CSCR)
Initial Value
0
0
0
R/W
R/W
⎯
R/W
Description
PCC0 Software Card Detect Change Interrupt
A PCC0 software card detect change interrupt can be generated
by writing 1 to this bit. When this bit is set to 1, the same interrupt
as the PCC0 card detect change interrupt (bit 3 set status) occurs
if bit 3 (PCC0 card detect change enable) in the area 6 card
status change interrupt enable register (PCC0CSCIER) is set to
1. If bit 3 is cleared to 0, no interrupt occurs.
0: No software card detect change interrupt occurs for the PC
1: Software card detect change interrupt occurs for the PC card
Reserved
This bit is always read as 0. The write value should always be 0.
PCC0IREQ Request
Indicates the interrupt request for the IREQ pin of the PC card
when the PC card connected to area 6 is the I/O card interface
type. The P0IREQ bit is set to 1 when an interrupt request signal
in pulse mode or level mode is input to the IREQ. The mode is
selected by bits 5 and 6 (PCC0IREQ interrupt enable bits) in the
area 6 card status change interrupt enable register
(PCC0CSCIER). This bit can be cleared to 0 only in pulse mode.
Write 0 to bit 5 to clear the bit to 0. This bit is not changed if 1 is
written. In level mode, bit 5 is a read-only bit, which reflects the
IREQ state (if the IREQ is low, 1 is read). This bit always reads 0
on the IC memory card interface.
0: No interrupt request on the IREQ of the PC card when the PC
1: An interrupt request on the IREQ of the PC card has occurred
card connected to area 6
card is on the I/O card interface
when the PC card is on the I/O card interface
connected to area 6
Section 29 PC Card Controller (PCC)
Page 969 of 1414
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