HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1073
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Figure 30.4 Example of Initialization Flow
Set the TIE, RIE, TE, and RE bits in SCSCR
Set the parity using the O/E bit in SCSMR
Clear the TE and RE bits in SCSCR to 0
Set the clock using the CKE1 and CKE0
TE, RE, TEIE, and WAIT_IE flags to 0.
bits in SCSCR. Clear the TIE, RIE,
Set the LCB, PB, SMIF, SDIR, and
Clear the ERS, PER, ORER, and
WAIT_ER flags in SCSSR to 0
SINV bits in SCSCMR
interval elapsed?
Set SCBRR
Has a 1-bit
Initialization
End
Yes
Wait
No
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Section 30 SIM Card Module (SIM)
Page 1013 of 1414
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