HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1178

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 33 User Break Controller (UBC)
Table 33.2 Specifying Break Data Register
Notes: 1. Specify an operand size when including the value of the data bus in the break
33.2.7
BDMRB is a 32-bit readable/writable register. BDMRB specifies bits masked in the break data
specified by BDRB.
Notes: 1. Specify an operand size when including the value of the data bus in the break
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Bus Selection in
BBRB
L bus
I bus
X bus
Y bus
Bit
31 to 0 BDMB31 to
2. When the byte size is selected as a break condition, the same byte data must be set in
3. Set the data in bits 31 to 16 when including the value of the data bus as an L-bus break
2. When the byte size is selected as a break condition, the same byte data must be set in
3. Set the mask data in bits 31 to 16 when including the value of the data bus as an L-bus
Bit Name
BDMB0
Break Data Mask Register B (BDMRB)
condition.
bits 15 to 8 and 7 to 0 in BDRB as the break data.
condition for the MOVS.W @-As,Ds, MOVS.W @As,Ds, MOVS.W @As+,Ds, or
MOVS.W @As+Ix,Ds instruction.
condition.
bits 15 to 8 and 7 to 0 in BDRB as the break mask data in BDMRB.
break condition for the MOVS.W @-As,Ds, MOVS.W @As,Ds, MOVS.W @As+,Ds, or
MOVS.W @As+Ix,Ds instruction.
BDB31 to BDB16
XDB15 to XDB0
Don’t care
Initial
Value
All 0
R/W
R/W
Description
Break Data Mask B
Specifies bits masked in the break data of channel B
specified by BDRB (BDB31 to BDB0).
0: Break data BDBn of channel B is included in the
1: Break data BDBn of channel B is masked and is not
Note: n = 31 to 0
break condition
included in the break condition
LDB31 to LDB0
IDB31 to IDB0
BDB15 to BDB0
Don't care
YDB15 to YDB0
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010