HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1180

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 33 User Break Controller (UBC)
33.2.9
BRCR sets the following conditions:
1. Channels A and B are used in two independent channel conditions or under the sequential
2. A break is set before or after instruction execution.
3. Specify whether to include the number of execution times on channel B in comparison
4. Determine whether to include data bus on channel B in comparison conditions.
5. Enable PC trace.
6. Enable ASID check.
BRCR is a 32-bit readable/writable register that has break conditions match flags and bits for
setting a variety of break conditions.
Page 1120 of 1414
Bit
3
2
1
0
condition.
conditions.
Break Control Register (BRCR)
Bit Name
RWB1
RWB0
SZB1
SZB0
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Read/Write Select B
Select the read cycle or write cycle as the bus cycle of
the channel B break condition.
00: Condition comparison is not performed
01: The break condition is the read cycle
10: The break condition is the write cycle
11: The break condition is the read cycle or write cycle
Operand Size Select B
Select the operand size of the bus cycle for the
channel B break condition.
00: The break condition does not include operand size
01: The break condition is byte access
10: The break condition is word access
11: The break condition is longword access
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010