HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 179
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
Table 3.18 Correspondence between DSP Instruction Operands and Registers
When writing parallel instructions, the field-B instruction is written first, followed by the field-A
instruction. A sample parallel processing program is shown in figure 3.6.
Square brackets mean that the contents can be omitted.
The no operation instructions NOPX and NOPY can be omitted. For details on the field B in DSP
data operation instructions, refer to section 3.6.4, DSP Operation Instructions.
The DSR register condition code bit (DC) is always updated on the basis of the result of an
unconditional ALU or shift operation instruction. Conditional instructions do not update the DC
bit. Multiply instructions, also, do not update the DC bit. DC bit updating is performed by means
of the CS[2:0] bits in the DSR register. The DC bit update rules are shown in table 3.19.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Register
A0
A1
M0
M1
X0
X1
Y0
Y1
DCF
PADD
PINC
PCMP
Sx
Yes
Yes
Yes
Yes
A0,
M1,
M1,
Figure 3.6 Sample Parallel Instruction Program
M0,
A1
M0
Sy
Yes
Yes
Yes
Yes
A0
ALU Operations
PMULS X0, Y0, M0
Dz
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Du
Yes
Yes
Yes
Yes
MOVX.W
MOVX.W
MOVX.W
@R4+,
@R5+R8,
@R4,
Se
Yes
Yes
Yes
Yes
X0
X0
X1
Multiply Operations
Section 3 DSP Operating Unit
Sf
Yes
Yes
Yes
Yes
MOVY.W
MOVY.W
[NOPY]
@R6+,
@R7+,
Page 119 of 1414
Dg
Yes
Yes
Yes
Yes
Y0
Y1
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