HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 22

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

24.4
24.5
24.6
24.7
Section 25 USB Function Controller (USBF) ...................................................803
25.1
25.2
25.3
Page xxii of lx
24.3.12 Hc Bulk Current ED Register (USBHBCED) .................................................. 781
24.3.13 Hc Done Head ED Register (USBHDHED) ..................................................... 781
24.3.14 Hc Fm Interval Register (USBHFI) .................................................................. 781
24.3.15 Hc Frame Remaining Register (USBHFR)....................................................... 783
24.3.16 Hc Fm Number b Register (USBHFN)............................................................. 784
24.3.17 Hc Periodic Start Register (USBHPS) .............................................................. 785
24.3.18 Hc LS Threshold Register (USBHLST) ........................................................... 786
24.3.19 Hc Rh Descriptor A Register (USBHRDA)...................................................... 787
24.3.20 Hc Rh Descriptor B Register (USBHRDB) ...................................................... 789
24.3.21 Hc Rh Status Register (USBHRS) .................................................................... 790
24.3.22 Hc Rh Port Status 1 and Hc Rh Port Status 2 Registers
Data Storage Format which Required by USB Host Controller ....................................... 798
24.4.1
24.4.2
Data Alignment Restriction of USB Host Controller ....................................................... 799
24.5.1
24.5.2
Accessing External Address from the USB Host.............................................................. 800
Usage Notes ...................................................................................................................... 801
Features............................................................................................................................. 803
Input/Output Pins.............................................................................................................. 805
Register Descriptions........................................................................................................ 806
25.3.1
25.3.2
25.3.3
25.3.4
25.3.5
25.3.6
25.3.7
25.3.8
25.3.9
25.3.10 Interrupt Select Register 4 (ISR4)..................................................................... 818
25.3.11 Interrupt Enable Register 0 (IER0) ................................................................... 818
25.3.12 Interrupt Enable Register 1 (IER1) ................................................................... 819
25.3.13 Interrupt Enable Register 2 (IER2) ................................................................... 819
25.3.14 Interrupt Enable Register 3 (IER3) ................................................................... 820
25.3.15 Interrupt Enable Register 4 (IER4) ................................................................... 820
(USBHRPS1, USBHRPS2) .............................................................................. 792
Storage Format of the Transferred Data............................................................ 798
Storage Format of the Descriptor...................................................................... 799
Restriction on the Line Boundary of the Synchronous DRAM ........................ 799
Restriction on the Memory Access Address ..................................................... 800
Interrupt Flag Register 0 (IFR0) ....................................................................... 808
Interrupt Flag Register 1 (IFR1) ....................................................................... 810
Interrupt Flag Register 2 (IFR2) ....................................................................... 811
Interrupt Flag Register 3 (IFR3) ....................................................................... 813
Interrupt Flag Register 4 (IFR4) ....................................................................... 815
Interrupt Select Register 0 (ISR0)..................................................................... 816
Interrupt Select Register 1 (ISR1)..................................................................... 816
Interrupt Select Register 2 (ISR2)..................................................................... 817
Interrupt Select Register 3 (ISR3)..................................................................... 817
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010