HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 444

Manufacturer Part Number

HD6417720BP133BV

SH3-DSP, WITH USB AND LCDC, PB-F

Manufacturer

Renesas Electronics America

SuperH® SH7700r

Core Processor

Connectivity

FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB

DMA, LCD, POR, WDT

Number Of I /o

Program Memory Type

Voltage - Supply (vcc/vdd)

1.4 V ~ 1.6 V

Data Converters

A/D 4x10b; D/A 2x8b

Oscillator Type

Operating Temperature

-20°C ~ 75°C

Package / Case

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Program Memory Size

Section 9 Bus State Controller (BSC)

• Deep power-down mode

If the RMODE bit of the SDCR is set to 1 while the DEEP and RFSH bits of the SDCR are set to

1, the low-power SDRAM enters the deep power-down mode. If the RMODE bit is cleared to 0,

the CKE signal is pulled high to cancel the deep power-down mode. Before executing an access

after returning from the deep power-down mode, the power-up sequence must be re-executed.

Page 384 of 1414

The low-power SDRAM supports the deep power-down mode as a low-power consumption

mode. In the partial self-refresh function, self-refresh is performed on a specific area. In the

deep power-down mode, self-refresh will not be performed on any memory area. This mode is

effective in systems where all of the system memory areas are used as work areas.

1. Address pin to be connected to the BA1 pin of SDRAM.

2. Address pin to be connected to the BA0 pin of SDRAM.

3. Address pin to be connected to the A10 pin of SDRAM.

4. The waveform for DACKn is when active low is specified.

Figure 9.29 EMRS Command Issue Timing

SH7720 Group, SH7721 Group

R01UH0083EJ0400 Rev. 4.00

Sep 21, 2010