HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 471
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
Section 10 Direct Memory Access Controller (DMAC)
(6) Channel 5
• DMA source address register_5 (SAR_5)
• DMA destination address register_5 (DAR_5)
• DMA transfer count register_5 (DMATCR_5)
• DMA channel control register_5 (CHCR_5)
(7) Common
• DMA operation register (DMAOR)
• DMA extended resource selector 0 (DMARS0)
• DMA extended resource selector 1 (DMARS1)
• DMA extended resource selector 2 (DMARS2)
10.3.1
DMA Source Address Registers (SAR_0 to SAR_5)
SAR are 32-bit readable/writable registers that specify the source address of a DMA transfer.
During a DMA transfer, these registers indicate the next source address. When the data is
transferred from an external device with the DACK in single address mode, the SAR is ignored.
To transfer data in 16 bits or in 32 bits, specify the address with 16-bit or 32-bit address boundary.
When transferring data in 16-byte units, a 16-byte boundary must be set for the source address
value. The initial value is undefined.
R01UH0083EJ0400 Rev. 4.00
Page 411 of 1414
Sep 21, 2010
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