HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 668

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 18 Serial Communication Interface with FIFO (SCIF)
Note:
Page 608 of 1414
Bit
0
* The only value that can be written is 0 to clear the flag.
Bit Name
DR
Initial Value
0
R/W
R/(W)* Receive Data Ready
Description
Indicates that the receive FIFO data register
(SCFRDR) stores the data which is less than the
specified number of receive triggers, and that next
data is not yet received after 15 etu has elapsed
from the last stop bit in asynchronous mode.
0: Receive is in progress, or no received data
[Clearing conditions] (Initial value)
1: Next receive data is not received
[Setting condition]
SCFRDR stores the data which is less than the
specified number of receive triggers, and that next
data is not yet received after 15 etu has elapsed
from the last stop bit.*
Note:
remains in SCFRDR after the receive ended
normally.
Power-on reset, manual reset
All receive data in SCFRDR is read, and DR is
read as 1, then written to with 0.
* This is equivalent to 1.5 frames with the
8-bit 1-stop-bit format. (etu: Element
Time Unit)
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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