HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 715

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
20.3.4
ICIER enables or disables interrupt sources and acknowledge bits, sets acknowledge bits to be
transferred, and confirms acknowledge bits to be received.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
7
6
5
4
Bit Name
TIE
TEIE
RIE
NAKIE
I
2
C Bus Interrupt Enable Register (ICIER)
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Transmit Interrupt Enable
When the TDRE bit in ICSR is set to 1, this bit enables or
disables the transmit data empty interrupt (TXI).
0: Transmit data empty interrupt request (TXI) is disabled.
1: Transmit data empty interrupt request (TXI) is enabled.
Transmit End Interrupt Enable
This bit enables or disables the transmit end interrupt
(TEI) at the rising of the ninth clock while the TDRE bit in
ICSR is 1. TEI can be canceled by clearing the TEND bit
or the TEIE bit to 0.
0: Transmit end interrupt request (TEI) is disabled.
1: Transmit end interrupt request (TEI) is enabled.
Receive Interrupt Enable
This bit enables or disables the receive data full interrupt
request (RXI) when a receive data is transferred from
ICDRS to ICDRR and the RDRF bit in ICSR is set to 1.
RXI can be canceled by clearing the RDRF or RIE bit to
0.
0: Receive data full interrupt request (RXI) is disabled.
1: Receive data full interrupt request (RXI) is enabled.
NACK Receive Interrupt Enable
This bit enables or disables the NACK receive interrupt
request (NAKI) when the NACKF and AL bits in ICSR are
set to 1. NAKI can be canceled by clearing the NACKF,
OVE, or NAKIE bit to 0.
0: NACK receive interrupt request (NAKI) is disabled.
1: NACK receive interrupt request (NAKI) is enabled.
Section 20 I
2
C Bus Interface (IIC)
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