HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 734
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Section 20 I
Page 674 of 1414
No
No
No
2
C Bus Interface (IIC)
Clear TRS in ICCR1 to 0
Slave transmit mode
Read TDRE in ICSR
Read TEND in ICSR
Clear TEND in ICSR
Dummy read ICDRR
Clear TDRE in ICSR
Clear AAS in ICSR
Write transmit data
Write transmit data
TEND=1 ?
TDRE=1 ?
in ICDRT
in ICDRT
Figure 20.16 Sample Flowchart for Slave Transmit Mode
byte?
End
Last
Yes
Yes
Yes
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[1] Clear the AAS flag.
[2] Set transmit data for ICDRT (except for the last data).
[3] Wait for ICDRT empty.
[4] Set the last byte of transmit data.
[5] Wait for the last byte to be transmitted.
[6] Clear the TEND flag .
[7] Set slave receive mode.
[8] Dummy-read ICDRR to release the SCL line.
[9] Clear the TDRE flag.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
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