HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 755

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
9
8
7, 6
Bit Name
RFFUL
RDREQ
⎯
Initial
Value
0
0
All 0
R/W
R
R
R
Description
Receive FIFO Full
0: Receive FIFO not full
1: Receive FIFO full
•
•
•
Receive Data Transfer Request
0: Indicates that the size of valid space in the receive
1: Indicates that the size of valid space in the receive
A receive data transfer request is issued when the valid
space in the receive FIFO exceeds the size specified by
the RFWM bit in SIFCTR.
When using receive data transfer through the DMAC, this
bit is always cleared by one DMAC access. After DMAC
access, when conditions for setting this bit are satisfied,
the SIOF again indicates 1 for this bit.
•
•
•
Reserved
These bits are always read as 0. The write value should
always be 0.
FIFO does not exceed the size specified by the RFWM
bit in SIFCTR.
FIFO exceeds the size specified by the RFWM bit in
SIFCTR.
This bit is valid when the RXE bit in SICTR is 1.
This bit indicates a state; if SIRDR is read, the SIOF
clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
This bit is valid when the RXE bit in SICTR is 1.
This bit indicates a state; if the size of valid space in
the receive FIFO is less than the size specified by the
RFWM bit in SIFCTR, the SIOF clears this bit.
If the issue of interrupts by this bit is enabled, an
SIOF interrupt is issued.
Section 21 Serial I/O with FIFO (SIOF)
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