HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 87
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Classification
Interrupts
Address bus
Data bus
Bus control
Symbol
PINT15 to
PINT0
REFOUT
IRQOUT
A25 to A0
D31 to D0
CS4 to CS2,
CS0
CS6A, CS6B,
CS5A, CS5B,
CE2A, CE2B,
CE1A, CE1B
RD
RD/WR
BS
BACK
BREQ
WE
WE3 (BE3)
WE2 (BE2)
WE1 (BE1)
WE0 (BE0)
CKE
I/O
I
O
O
O
I/O
O
O
O
O
O
I
O
O
O
O
O
O
Name
Port interrupt
requests 15 to 0
Bus request
Bus request
Address bus
Data bus
Chip select
Read strobe
Read/write
signal
Bus start
Bus request
acknowledge
Bus request
Write enable
Highest-byte
write
Second-highest-
byte write
Second-lowest-
byte write
Lowest-byte
write
Clock enable
Function
Port interrupt request pins
Bus request signal for refreshing
Bus request signal for interrupt
Outputs addresses.
32-bit bidirectional data bus
Chip-select signal for external
memory or devices.
Indicates reading of data from
external devices.
Read/write signal
Bus-cycle start signal pin
Indicates that the bus mastership
has been released to an external
device.
Low when an external device
requests the release of the bus
mastership.
Write enable pin for PCMCIA
Indicates that bits 31 to 24 of the
data in the external memory or
device are being written.
Indicates that bits 23 to 16 of the
data in the external memory or
device are being written.
Indicates that bits 15 to 8 of the
data in the external memory or
device are being written.
Indicates that bits 7 to 0 of the data
in the external memory or device
are being written.
Clock enable (SDRAM)
Section 1 Overview
Page 27 of 1414
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