M30803FGFP#U3 Renesas Electronics America, M30803FGFP#U3 Datasheet - Page 314
![MCU 3/5V 256K I-TEMP PB-FREE 100](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
M30803FGFP#U3
Manufacturer Part Number
M30803FGFP#U3
Description
MCU 3/5V 256K I-TEMP PB-FREE 100
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/80r
Datasheet
1.M30803FGGPU3.pdf
(360 pages)
Specifications of M30803FGFP#U3
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M
R
R
e
E
1
v
J
6
Figure 32.6 Timing for erasing all unlocked blocks
Figure 32.7 Timing for the lock bit program
1 .
0
C
9
0 .
8 /
B
0
0
Erase All Unlocked Blocks Command
Lock Bit Program Command
0
1
A
This command erases the content of all blocks. Execute the erase all unlocked blocks command as
explained here following.
When block erasing ends, the RTS
erase operation can be known by reading the status register. Each block can be erase-protected with the
lock bit. For more information, see the section on the data protection function.
This command writes “0” (lock) for the lock bit of the specified block. Execute the lock bit program
command as explained here following.
When writing ends, the RTS
be read with the read lock bit status command. For information on the lock bit function, reset proce-
dure and so on, see the section on the data protection function.
G
8
u
7
o r
(1) Transfer the “A7
(2) Transfer the verify command code “D0
(1) Transfer the “77
(2) Transfer addresses A
(3) Transfer the verify command code “D0
. g
0 -
u
1
0
erase operation will start and continue for all blocks in the flash memory.
written for the lock bit of the specified block. Write the highest address of the specified block for
addresses A
p
0
, 2
0
2
0
0
5
(M16C reception data)
(M16C reception data)
(M16C transmit data)
Page 301
(M16C transmit data)
8
to A
RTS1(BUSY)
16
RTS1(BUSY)
16
23
” command code with the 1st byte.
” command code with the 1st byte.
f o
.
3
8
2
1
CLK1
RxD1
TxD1
9
to A
(BUSY) signal changes from the “H” to the “L” level. Lock bit status can
CLK1
RxD1
TxD1
15
1
(BUSY) signal changes from the “H” to the “L” level. The result of the
and A
16
A7
16
77
16
to A
” with the 4th byte. With the verify command code, “0” is
” with the 2nd byte. With the verify command code, the
16
16
23
with the 2nd and 3rd bytes respectively.
D0
A
A
8
15
16
to
A
A
16
23
to
32. Standard serial I/O mode
D0
16
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