HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 1019

• Manufacturer Part Number: HD6417751RF240V
• Description: MPU 1.5/3.3V 0K PB-FREE 256-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417751RF240V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-QFP Exposed Pad, 256-eQFP, 256-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

The PCIPINT register is initialized to H'00000000 at a power-on reset. It is not initialized at a
software reset. When an interrupt is detected, the bit corresponding to the content of that interrupt
is set to 1. Each interrupt detection bit can be cleared to 0 by writing 1 to it (write clear).
The power state D0 interrupt is not generated at a power-on reset.
Bits 31 to 2—Reserved: These bits always return 0 when read. Always write 0 to these bits when
writing.
Bit 1—Power state D3 (PWRST_D3): Transition request to power-down mode interrupt for this
LSI.
Bit 0—Power state D0 (PWRST_D0): Restore from power-down mode interrupt for this LSI.
Note: The power states D3, D0 are not masked even when the interrupt mask bit is set ON.
22.2.36 PCI Power Management Interrupt Mask Register (PCIPINTM)
The PCI power management interrupt mask register (PCIPINTM) sets the interrupt mask for the
power management interrupts. This 32-bit read/write register can be accessed from the PP bus.
The PCIPINTM register is initialized to H'00000000 at a power-on reset. It is not initialized at a
software reset.
Interrupt masks can be set for both the interrupt for a transition to the power state D3 (power down
mode) and recovery to the power state D0 (normal status). Setting the respective bit to 0 disables
the interrupt and setting it to 1 enables the interrupt.
PP Bus-R/W:
PP Bus-R/W:
Initial value:
Initial value:
PCI-R/W:
PCI-R/W:
Bit:
Bit:
31
—
—
—
—
R
R
0
7
0
30
—
—
—
—
R
R
0
6
0
29
—
—
—
—
R
R
0
0
5
. . .
. . .
. . .
. . .
. . .
—
—
R
4
0
Rev.4.00 Oct. 10, 2008 Page 919 of 1122
11
—
—
—
—
R
R
0
3
0
10
—
—
—
—
R
R
0
2
0
22. PCI Controller (PCIC)
DPERR_
REJ09B0370-0400
R/W
WT
—
—
—
R
9
0
1
0
DPERR_
R/W
RD
—
—
—
R
8
0
0
0