HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 105

MPU 1.5/3.3V 0K PB-FREE 256-QFP

HD6417751RF240V

Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417751RF240V

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Item
Cache memory
[SH7751]
Cache memory
[SH7751R]
Features
Instruction cache (IC)
⎯ 8 Kbytes, direct mapping
⎯ 256 entries, 32-byte block length
⎯ Normal mode (8-Kbyte cache)
⎯ Index mode
Operand cache (OC)
⎯ 16 Kbytes, direct mapping
⎯ 512 entries, 32-byte block length
⎯ Normal mode (16-Kbyte cache)
⎯ Index mode
⎯ RAM mode (8-Kbyte cache + 8-Kbyte RAM)
⎯ Choice of write method (copy-back or write-through)
Single-stage copy-back buffer, single-stage write-through buffer
Cache memory contents can be accessed directly by address mapping
(usable as on-chip memory)
Store queue (32 bytes × 2 entries)
Instruction cache (IC)
⎯ 16 Kbytes, 2-way set associative
⎯ 256 entries/way, 32-byte block length
⎯ Cache-double-mode (16-Kbyte cache)
⎯ Index mode
⎯ SH7751-compatible mode (8 Kbytes, direct mapping)
Operand cache (OC)
⎯ 32 Kbytes, 2-way set associative
⎯ 512 entries/way, 32-byte block length
⎯ Cache-double-mode (32-Kbyte cache)
⎯ Index mode
⎯ RAM mode (16-Kbyte cache + 16-Kbyte RAM)
⎯ Choice of write method (copy-back or write-through)
⎯ SH7751-compatible mode (16 Kbytes, direct mapping)
Single-stage copy-back buffer, single-stage write-through buffer
Cache memory contents can be accessed directly by address mapping
(usable as on-chip memory)
Store queue (32 bytes × 2 entries)
Rev.4.00 Oct. 10, 2008 Page 5 of 1122
REJ09B0370-0400
1. Overview

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