HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 215
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 215 of 1226
- Download datasheet (7Mb)
Examples
Example 1 A store instruction accessing internal RAM occurs within four instructions after an
MOV.L #H'0C400000, R0
MOV.L #H'7C000204, R1
MOV.L @R0, R2
NOP
NOP
NOP
MOV.L R3, @R1
Example 2 A store instruction accessing internal RAM occurs within four instructions after an
MOV.L #H'7C002000, R1
MOV.L #H'12345678, R0
NOP
NOP
NOP
MOV.L R0, @R1
Example 3 A debugging tool generates a break to swap an instruction.
Original Instruction String After Instruction Swap Break
MOV.L #H'7C000000, R0
ADD R0, R0
MOV.L R1, @R0
instruction generating a TLB miss exception.
instruction causing an interrupt to be accepted.
MOV.L #H'7C000000, R0
TRAPA #H'01
MOV.L R1, @R0
R0 is an address causing a TLB miss.
R1 is an address mapped to internal RAM.
TLB miss exception occurs.
1st word
2nd word
3rd word
Store instruction accessing internal RAM
R1 is an address mapped to internal RAM.
An interrupt is accepted after this instruction.
1st word
2nd word
3rd word
Store instruction accessing internal RAM
Rev.4.00 Oct. 10, 2008 Page 115 of 1122
Contains address corresponding to R0.
R0 address is not a problem in original
instruction string.
Internal RAM is accessed by a store
operation because ADD is not executed.
The store is cancelled, but 2LW starting
at H'7C002000 is corrupted.
REJ09B0370-0400
4. Caches
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