HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 340
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9. Power-Down Modes
Table 9.1
Power-
Down
Mode
Sleep
Deep
sleep
Standby SLEEP
Hard-
ware
standby
Module
standby
Note:
Rev.4.00 Oct. 10, 2008 Page 240 of 1122
REJ09B0370-0400
*
Entering
Conditions CPG
SLEEP
instruction
executed
while STBY
bit is 0 in
STBCR
SLEEP
instruction
executed
while STBY
bit is 0 in
STBCR,
and DSLP
bit is 1 in
STBCR2
instruction
executed
while STBY
bit is 1 in
STBCR
Setting CA
pin to low
level
Setting
MSTP bit to
1 in STBCR
The RTC operates when the START bit in RCR2 is 1 (see section 11, Realtime Clock
(RTC)).
Status of CPU and Peripheral Modules in Power-Down Modes
Operating Halted
Operating Halted
Halted
Halted
Operating Operating Held
CPU
(registers
held)
(registers
held)
Halted
(registers
held)
Halted
On-Chip
Memory
Held
Held
Held
Unde-
fined
Status
On-chip
Peripheral
Modules
Operating
Operating
(DMA
halted)
Halted*
Halted*
Specified
modules
halted*
Pins
Held
Held
Held
High-
imped-
ance
state
Held
External
Memory
Refresh-
ing
Self-
refresh-
ing
Self-
refresh-
ing
Unde-
fined
Refresh-
ing
Exiting
Method
• Interrupt
• Reset
• Interrupt
• Reset
• Interrupt
• Reset
• Power-on
• Clearing
• Reset
reset
MSTP bit
to 0
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