HD6417751RF240V Renesas Electronics America, HD6417751RF240V Datasheet - Page 786
HD6417751RF240V
Manufacturer Part Number
HD6417751RF240V
Description
MPU 1.5/3.3V 0K PB-FREE 256-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417751RBP200DV.pdf
(1226 pages)
Specifications of HD6417751RF240V
Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
39
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
256-QFP Exposed Pad, 256-eQFP, 256-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417751RF240V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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16. Serial Communication Interface with FIFO (SCIF)
Bit 3—Framing Error (FER): Indicates whether or not a framing error has been found in the
data that is to be read from the receive FIFO data register (SCFRDR2).
Bit 3: FER
0
1
Bit 2—Parity Error (PER): Indicates whether or not a parity error has been found in the data that
is to be read from the receive FIFO data register (SCFRDR2).
Bit 2: PER
0
1
Rev.4.00 Oct. 10, 2008 Page 686 of 1122
REJ09B0370-0400
Description
There is no framing error in the receive data that is to be read from
SCFRDR2
[Clearing conditions]
•
•
There is a framing error in the receive data that is to be read from
SCFRDR2
[Setting condition]
When there is a framing error in the data that is to be read next from
SCFRDR2
Description
There is no parity error in the receive data that is to be read from SCFRDR2
[Clearing conditions]
•
•
There is a parity error in the receive data that is to be read from SCFRDR2
[Setting condition]
When there is a parity error in the data that is to be read next from
SCFRDR2
Power-on reset or manual reset
When there is no framing error in the data that is to be read next from
SCFRDR2
Power-on reset or manual reset
When there is no parity error in the data that is to be read next from
SCFRDR2
(Initial value)
(Initial value)
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