UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 246
UPD78F9201MA-CAC-A
Manufacturer Part Number
UPD78F9201MA-CAC-A
Description
MCU 8BIT 2KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9500MA-CAC-A.pdf
(342 pages)
Specifications of UPD78F9201MA-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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16.8.4 Example of shifting normal mode to self programming mode
programming.
244
The operating mode must be shifted from normal mode to self programming mode before performing self
An example of shifting to self programming mode is explained below.
<1> Disable interrupts if the interrupt function is used (by setting the interrupt mask flag registers (MK0) to FFH
<2> Clear FLCMD (FLCMD=00H).
<3> Clear the flash status register (PFS).
<4> Set self programming mode using a specific sequence.
<5> Execute NOP instruction and HALT instruction.
<6> Check the execution result of the specific sequence using bit 0 (FPRERR) of PFS.
<7> Mode shift is completed.
Note Set the CPU clock so that it is 1 MHz or more during self programming.
Caution Be sure to perform the series of operations described above using the user program at an
•
and executing the DI instruction).
• Write a specific value (A5H) to PFCMD.
• Write 01H to FLPMC (writing in this step is invalid).
• Write 0FEH (inverted value of 01H) to FLPMC (writing in this step is invalid).
• Write 01H to FLPMC (writing in this step is valid).
Abnormal → <3>, normal → <7>
μ
PRSELF4
PD78F9202, 78F9502
0
0
0
0
0
0
0
0
1
address where data is not erased or written.
PRSELF3
1
1
1
1
1
1
1
1
1
Other than above
PRSELF2
Figure 16-17. Format of Protect Byte (2/2)
0
0
0
0
1
1
1
1
1
CHAPTER 16 FLASH MEMORY
User’s Manual U18172EJ3V0UD
PRSELF1
0
0
1
1
0
0
1
1
1
PRSELF0
Note
0
1
0
1
0
1
0
1
1
Blocks 15 to 0 are protected.
Blocks 13 to 0 are protected.
Blocks 14 and 15 can be written or erased.
Blocks 11 to 0 are protected.
Blocks 12 to 15 can be written or erased.
Blocks 9 to 0 are protected.
Blocks 10 to 15 can be written or erased.
Blocks 7 to 0 are protected.
Blocks 8 to 15 can be written or erased.
Blocks 5 to 0 are protected.
Blocks 6 to 15 can be written or erased.
Blocks 3 to 0 are protected.
Blocks 4 to 15 can be written or erased.
Blocks 1 and 0 are protected.
Blocks 2 to 15 can be written or erased.
All blocks can be written or erased.
Setting prohibited
Status
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