UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 270
UPD78F9201MA-CAC-A
Manufacturer Part Number
UPD78F9201MA-CAC-A
Description
MCU 8BIT 2KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9500MA-CAC-A.pdf
(342 pages)
Specifications of UPD78F9201MA-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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FlashVerify:
ModeOffLoop:
;---------------------------------------------------------------------
;END (abnormal termination processing); Perform processing to shift to
;---------------------------------------------------------------------
StatusError:
normal mode in order to return to normal processing
INCW
BR
MOVW
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
HALT
MOV
CMP
BNZ
MOV
MOV
MOV
MOV
MOV
MOV
BT PFS.0,$ModeOffLoop
MOV
EI
BR
DE
FlashWriteLoop
HL,#WriteAdr
FLCMD,#02H
A,H
FLAPH,A
A,L
FLAPL,A
A,D
FLAPHC,A
A,E
FLAPLC,A
WDTE,#0ACH
A,PFS
A,#00H
$StatusError
FLCMD,#00H
PFS,#00H
PFCMD,#0A5H
FLPMC,#00H
FLPMC,#0FFH
FLPMC,#00H
MK0,#INT_MK0
StatusNormal
; Address at which data is to be written + 1
; Sets verify address
; Sets flash control command (internal verify 2)
; Sets verify start address
; Sets verify start address
; Sets verify end address
; Sets verify end address
; Clears & restarts WDT
; Self programming is started
; Checks internal verify error
; Performs abnormal termination processing when an error
; occurs.
; Clears FLCMD register
; Clears flash status register
; PFCMD register control
; FLPMC register control (sets value)
; FLPMC register control (inverts set value)
; Sets normal mode via FLPMC register control (sets value)
; Checks completion of write to specific registers
; Repeats the same processing when an error occurs.
; After the specific sequence is correctly executed, restore
; the CPU clock to its setting before the self programming
; Restores interrupt mask flag
CHAPTER 16 FLASH MEMORY
User’s Manual U18172EJ3V0UD
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