UPD78F9202MA-CAC-A Renesas Electronics America, UPD78F9202MA-CAC-A Datasheet - Page 184
UPD78F9202MA-CAC-A
Manufacturer Part Number
UPD78F9202MA-CAC-A
Description
MCU 8BIT 4KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet
1.UPD78F9500MA-CAC-A.pdf
(342 pages)
Specifications of UPD78F9202MA-CAC-A
Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9202MA-CAC-A
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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that order, the IE flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to
the PC, and execution branches.
the interrupt is acknowledged after the instruction under execution is complete. Figure 10-7 shows an example of the
interrupt request acknowledgment timing for an 8-bit data transfer instruction MOV A, r. Since this instruction is
executed for 4 clocks, if an interrupt occurs for 3 clocks after the instruction fetch starts, the interrupt acknowledgment
processing is performed after the MOV A, r instruction is executed.
182
A pending interrupt is acknowledged when a status in which it can be acknowledged is set.
Figure 10-6 shows the algorithm of interrupt request acknowledgment.
When a maskable interrupt request is acknowledged, the contents of the PSW and PC are saved to the stack in
To return from interrupt servicing, use the RETI instruction.
IE:
If an interrupt request flag (
IF:
MK:
Interrupt
Clock
CPU
Interrupt request flag
Interrupt mask flag
Flag to control maskable interrupt request acknowledgment (1 = enable, 0 = disable)
Figure 10-7. Interrupt Request Acknowledgment Timing (Example of MOV A, r)
Figure 10-6. Interrupt Request Acknowledgment Processing Algorithm
No
IF) is set before an instruction clock n (n = 4 to 10) under execution becomes n
MOV A, r
CHAPTER 10 INTERRUPT FUNCTIONS
Vectored interrupt
servicing
IE = 1?
MK = 0?
Start
IF = 1?
User’s Manual U18172EJ3V0UD
Yes (Interrupt request generated)
Yes
Yes
Saving PSW and PC, jump
No
No
to interrupt servicing
8 clocks
Interrupt request pending
Interrupt request pending
Interrupt servicing program
1,
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