UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 161
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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4.5 Settings of Port Mode Register and Output Latch When Using Alternate Function
4-15.
P00
P01
P20
P21
P22
P23
P30
P60
P61
To use the alternate function of a port pin, set the port mode register and output latch as shown in Tables 4-12 to
Notes 1. The pin function can be selected by using ADPC0 register, PM2 register, ADS register, OPAMP0E bit,
Remark
Pin Name
Table 4-12. Settings of Port Mode Register and Output Latch When Using Alternate Function
2.
3. During I
4. When using an input compliant with the SMBus Specifications in I
PM
P
and PGAIN bit. Refer to Tables 4-9 to 4-11 of 4.2.3 Port 2.
using POM6 register (refer to 4.3 (5) Port output mode register 6 (POM6)).
input buffer by using PIM6 register (refer to 4.3 (4) Port input mode register 6 (PIM6)).
:
PD78F0555, 78F0556, 78F0557 (products with operational amplifier) only
TI000
INTP0
TI010
TO00
ANI0
AMP0-
ANI1
AMP0OUT
PGAIN
ANI2
AMP0+
ANI3
INTP1
TI51
TOH1
SCLA0
TxD6
SDAA0
RxD6
:
: Port mode register
Note 1
Note 1
Note 1
Note 1
Don’t care
Port output latch
2
Notes 1, 2
Notes 1, 2
Notes 3, 4
C communication, set SCLA0 and SDAA0 to N-ch open drain output (V
Notes 1, 2
Notes 3, 4
Notes 1, 2
Function Name
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 4 PORT FUNCTIONS
Alternate Function
(78K0/KY2-L) (1/2)
Input
Input
Input
Output
Input
Input
Input
Output
Input
Input
Input
Input
Input
Input
Output
I/O
Output
I/O
Input
I/O
2
C communication, select the SMBus
PM
1
1
1
0
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
DD
tolerance) mode by
P
0
0
1
1
1
161
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