UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 244
UPD78F0552MA-FAA-AX
Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0551MA-FAA-AX.pdf
(822 pages)
Specifications of UPD78F0552MA-FAA-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2-L
5.6.6 CPU clock status transition diagram
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Figures 5-18 and 5-19 show the CPU clock status transition diagram of this product.
Note
Remark When LVI default start function enabled is set (option byte: LVISTART = 1), the CPU clock status changes to
Figure 5-18. CPU Clock Status Transition Diagram (When LVI Default Start Mode Function Stopped Is Set
When transitioning to the STOP mode, it is possible to achieve low power consumption by setting RMC = 56H
first.
(A) in the above figure when the supply voltage exceeds 1.91 V (TYP.), and to (B) after reset processing (12
to 51
μ
s).
(Option Byte: LVISTART = 0), 78K0/KY2-L, 78K0/KA2-L, and 78K0/KB2-L)
Internal low-speed oscillation: Operable
Internal high-speed oscillation: Operating
X1 oscillation/EXCLK input:
Selectable by CPU
(F)
Internal low-speed oscillation: Operable
Internal high-speed oscillation:
Selectable by CPU
X1 oscillation/EXCLK input: Operating
oscillation/EXCLK
input
CPU: X1
HALT
Internal low-speed oscillation:
Operable
Internal high-speed oscillation:
Operable
X1 oscillation/EXCLK input: Operating
(A)
(B)
with X1 oscillation or
Reset release
with internal high-
CPU: Operating
speed oscillation
(C)
CPU: Operating
Power ON
EXCLK input
Note
Note
Internal low-speed oscillation: Woken up
Internal high-speed oscillation: Woken up
X1 oscillation/EXCLK input: Stops (input port mode)
Internal low-speed oscillation: Operating
Internal high-speed oscillation: Operating
X1 oscillation/EXCLK input: Stops (input port mode)
(I)
(H)
(E)
CHAPTER 5 CLOCK GENERATOR
CPU: Internal high-
oscillation/EXCLK
CPU: Internal high-
speed oscillation
speed oscillation
input
CPU: X1
STOP
HALT
V
V
V
STOP
DD
DD
DD
< 1.61 V (TYP.)
1.61 V (TYP.)
1.8 V (MIN.)
Internal low-speed oscillation:
Operable
Internal high-speed oscillation:
Stops
X1 oscillation/EXCLK input: Stops
Internal low-speed oscillation:
Operable
Internal high-speed oscillation:
Operating
X1 oscillation/EXCLK input: Operable
Internal low-speed oscillation:
Operable
Internal high-speed oscillation:
Stops
X1 oscillation/EXCLK input: Stops
230
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