UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 82
UPD78F0552MA-FAA-AX
Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0551MA-FAA-AX.pdf
(822 pages)
Specifications of UPD78F0552MA-FAA-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 82 of 822
- Download datasheet (6Mb)
78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Data memory
space
Notes 1. When boot swap is not used: Set the option bytes to 0080H to 0084H, and the on-chip debug security IDs
Remark The flash memory is divided into blocks (one block = 1 KB). For the address values and block numbers,
Program
memory space
2. Writing boot cluster 0 can be prohibited depending on the setting of security (refer to 25.6
refer to Table 3-2 Correspondence Between Address Values and Block Numbers in Flash Memory.
When boot swap is used:
Settings).
FEDFH
FEFFH
FEE0H
FAFFH
FFFFH
FF00H
FB00H
7FFFH
8000H
0000H
Figure 3-4. Memory Map (
Special function registers
Internal high-speed RAM
General-purpose
32
Flash memory
32768
registers
1024
256
Reserved
(SFR)
8 bits
7 F F F H
7 C 0 0 H
7 B F F H
0 7 F F H
0 3 F F H
0 8 0 0 H
0 4 0 0 H
0 0 0 0 H
8 bits
8 bits
8 bits
to 0085H to 008EH.
Set the option bytes to 0080H to 0084H and 1080H to 1084H, and the on-chip
debug security IDs to 0085H to 008EH and 1085H to 108EH.
μ
PD78F0573, 78F0578, 78F0583, 78F0588)
Block 1FH
Block 01H
Block 00H
7FFFH
108EH
0FFFH
07FFH
008EH
108FH
107FH
008FH
007FH
003FH
1085H
1084H
1080H
1000H
0800H
0085H
0084H
0080H
0040H
0000H
1 KB
CHAPTER 3 CPU ARCHITECTURE
On-chip debug security
On-chip debug security
Option byte area
Option byte area
ID setting area
ID setting area
CALLF entry area
CALLT table area
Vector table area
Program area
Program area
Program area
1905
2048
10
10
64
64
5
5
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
8 bits
Note 1
Note 1
Note 1
Note 1
1FFFH
Boot cluster 0
Boot cluster 1
Security
Note 2
68
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