UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 337
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
SEMIKRON
Quantity:
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Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Note The capture interrupt signal (INTTM00n) is not generated when the reverse-phase edge of the TI00n pin input
Remark n = 0:
is selected to the valid edge of CR00n.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
Figure 7-57. Example of Software Processing for Pulse Width Measurement (2/2)
<1> Count operation start flow
<2> Capture trigger input flow
<3> Count operation stop flow
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
Edge detection of TI00n, TI01n pins
Generates capture interrupt
TMC0n3, TMC0n2 bits = 00
TMC0n3, TMC0n2 bits =
CR00n, CR01n registers
Calculated pulse width
Stores count value to
Register initial setting
from capture value
PRM0n register,
CRC0n register,
port setting
01 or 10
START
STOP
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Note
Initial setting of these registers is performed
before setting the TMC0n3 and TMC0n2 bits.
Starts count operation
The counter is initialized and counting is stopped
by clearing the TMC0n3 and TMC0n2 bits to 00.
337
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