UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 501
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
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Part Number:
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Company:
Part Number:
UPD78F0513AGB-GAF-AX
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Quantity:
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78K0/Kx2
(a) Serial interface CSI10
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
CSIE10 TRMD10 PM11
0
1
1
1
1
1
1
The relationship between the register settings and pins is shown below.
Notes 1. Can be set as port function.
Remark ×:
0
0
1
1
0
1
1
2. To use P12/SO10 as general-purpose port, set the serial clock selection register 10 (CSIC10) in the
3. To use P10/SCK10/T
4. To use the slave mode, set CKS102, CKS101, and CKS100 to 1, 1, 1.
×
×
×
Note 1
Note 1
Note 1
CSIE10:
TRMD10:
CKP10:
CKS102, CKS101, CKS100: Bits 2 to 0 of CSIC10
PM1×:
P1×:
1
1
1
1
default status (00H).
Table 16-2. Relationship Between Register Settings and Pins (1/2)
×
×
×
P11
Note 1
Note 1
Note 1
×
×
×
×
PM12
×
×
×
Note 1
Note 1
Note 1
0
0
0
0
X
D0 as port pins, clear CKP10 to 0.
×
×
×
P12
Note 1
Note 1
Note 1
0
0
0
0
don’t care
Bit 7 of serial operation mode register 10 (CSIM10)
Bit 6 of CSIM10
Bit 4 of serial clock selection register 10 (CSIC10)
Port mode register
Port output latch
PM10
×
Note 1
1
1
1
0
0
0
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
×
P10
Note 1
×
×
1
1
1
×
Master reception
transmission
transmission/
transmission/
reception
reception
transmission
Operation
reception
Master
Master
CSI10
Slave
Slave
Slave
Stop
Note 4
Note 4
Note 4
SI10/R
R
R
R
X
X
X
D0/P11
D0/P11
D0/P11
SI10
SI10
SI10
SI10
P11
X
D0/
Pin Function
SO10/P12
P12
P12
P12
SO10
SO10
SO10
SO10
Note 2
Note 2
Note 2
T
(input)
(input)
(input)
SCK10/
(output)
(output)
(output)
P10
X
SCK10
SCK10
SCK10
SCK10
SCK10
SCK10
T
D0/P10
X
D0/
Note 3
Note 4
Note 4
Note 4
501
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