UPD78F1143AGA-HAB-AX Renesas Electronics America, UPD78F1143AGA-HAB-AX Datasheet - Page 614
UPD78F1143AGA-HAB-AX
Manufacturer Part Number
UPD78F1143AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1143AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
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Price
Company:
Part Number:
UPD78F1143AGA-HAB-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(a) Release by unmasked interrupt request
Standby release signal
Standby release signal
(external clock input)
When an unmasked interrupt request is generated, the STOP mode is released.
stabilization time has elapsed, if interrupt acknowledgment is enabled, vectored interrupt servicing is carried
out. If interrupt acknowledgment is disabled, the next address instruction is executed.
Notes 1. When the oscillation stabilization time set by OSTS is equal to or shorter than 61
Remarks 1. The broken lines indicate the case when the interrupt request that has released the standby
Status of CPU
(X1 oscillation)
system clock
Status of CPU
(2) When high-speed system clock (external clock input) is used as CPU clock
High-speed
system clock
2. When f
3. The wait time is as follows:
High-speed
2. f
(1) When high-speed system clock (X1 oscillation) is used as CPU clock
Figure 17-6. STOP Mode Release by Interrupt Request Generation (1/2)
status is retained to a maximum of “61
• When vectored interrupt servicing is carried out:
• When vectored interrupt servicing is not carried out: 5 or 6 clocks
mode is acknowledged.
f
EX
CLK
: External main system clock frequency
: CPU/peripheral hardware clock frequency
CLK
Normal operation
Normal operation
= f
system clock)
system clock)
(high-speed
Oscillates
(high-speed
Oscillates
EX
instruction
CHAPTER 17 STANDBY FUNCTION
STOP
instruction
STOP
User’s Manual U17854EJ9V0UD
Oscillation stopped
STOP mode
Oscillation stopped
STOP mode
Interrupt
request
Interrupt
request
μ
s + wait time”.
Oscillation stabilization time (set by OSTS)
Oscillation stabilization wait
Supply of the CPU
(23 to 61 s
clock is stopped
(HALT mode status)
10 to 12 clocks
Time set by
μ
OSTS
Oscillates
Note 2
)
Note 1
Wait
Oscillates
Note 3
Normal operation
Normal operation
system clock)
system clock)
(high-speed
(high-speed
After the oscillation
μ
s, the HALT
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