UPD78F1143AGA-HAB-AX Renesas Electronics America, UPD78F1143AGA-HAB-AX Datasheet - Page 666
UPD78F1143AGA-HAB-AX
Manufacturer Part Number
UPD78F1143AGA-HAB-AX
Description
MCU 16BIT 78K0R/KX3 64-TQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1143AGA-HAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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UPD78F1143AGA-HAB-AX
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Notes 1. This pin is not required to be connected when using PG-FP5 or FL-PR5.
Remark
23.4 Connection of Pins on Board
provided on the target system. First provide a function that selects the normal operation mode or flash memory
programming mode on the board.
the same status as immediately after reset. Therefore, if the external device does not recognize the state immediately
after reset, the pins must be handled as described below.
23.4.1 FLMD0 pin
(1) In flash memory programming mode
(2) In normal operation mode
664
FLMD0
V
GND
CLK
/RESET
SI/RxD
SO/TxD
SCK
Signal Name
DD
To write the flash memory on-board, connectors that connect the dedicated flash memory programmer must be
When the flash memory programming mode is set, all the pins not used for programming the flash memory are in
Directly connect this pin to a flash memory programmer when data is written by the flash memory programmer.
This supplies a writing voltage of the V
The FLMD0 pin does not have to be pulled down externally because it is internally pulled down by reset. To pull
it down externally, use a resistor of 1 kΩ to 200 kΩ.
It is recommended to leave this pin open during normal operation.
The FLMD0 pin must always be kept at the V
externally because it is internally pulled down by reset. However, pulling it down must be kept selected (i.e.,
FLMDPUP = “0”, default value) by using bit 7 (FLMDPUP) of the background event control register (BECTL) (see
23.5 (1) Back ground event control register). To pull it down externally, use a resistor of 200 kΩ or smaller.
Self programming and the rewriting of flash memory with the programmer can be prohibited using hardware, by
directly connecting this pin to the V
Notes 1, 2
Notes 2
2. Connect SI/RxD or SO/TxD when using QB-MINI2.
×: The pin does not have to be connected.
: Be sure to connect the pin.
Output
I/O
Output
Output
Input
Output
Output
Dedicated Flash Memory Programmer
I/O
−
Mode signal
V
Ground
Clock output
Reset signal
Receive signal
Transmit signal
Transfer clock
DD
voltage generation/power monitoring
SS
pin.
DD
CHAPTER 23 FLASH MEMORY
Table 23-2. Pin Connection
Pin Function
level to the FLMD0 pin.
User’s Manual U17854EJ9V0UD
SS
level before reset release but does not have to be pulled down
FLMD0
V
V
RESET
TOOL0
DD
SS
, EV
, EV
SS
DD
, AV
, AV
78K0R/KE3
Pin Name
SS
REF
−
−
Connection
×
×
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