UPD78F1144AGK-GAJ-AX Renesas Electronics America, UPD78F1144AGK-GAJ-AX Datasheet - Page 269
UPD78F1144AGK-GAJ-AX
Manufacturer Part Number
UPD78F1144AGK-GAJ-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1144AGK-GAJ-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
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Price
Company:
Part Number:
UPD78F1144AGK-GAJ-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Caution The RIFG and WAFG flags may be cleared when the RTCC1 register is written by using a 1-bit
Remark Fixed-cycle interrupts and alarm match interrupts use the same interrupt source (INTRTC). When
This flag indicates the status of generation of the constant-period interrupt. When the constant-period interrupt is
generated, it is set to “1”.
This flag is cleared when “0” is written to it. Writing “1” to it is invalid.
This status flag indicates whether the setting of RWAIT is valid.
Before reading or writing the counter value, confirm that the value of this flag is 1.
This bit controls the operation of the counter.
Be sure to write “1” to it to read or write the counter value.
Because RSUBC continues operation, complete reading or writing of it in 1 second, and clear this bit back to 0.
When RWAIT = 1, it takes up to 1 clock (32.768 kHz) until the counter value can be read or written.
If RSUBC overflows when RWAIT = 1, it counts up after RWAIT = 0. If the second count register is written,
however, it does not count up because RSUBC is cleared.
RWAIT
RWST
RIFG
manipulation instruction. Use, therefore, an 8-bit manipulation instruction in order to write to
the RTCC1 register. To prevent the RIFG and WAFG flags from being cleared during writing,
disable writing by setting “1” to the corresponding bit. When the value may be rewritten
because the RIFG and WAFG flags are not being used, the RTCC1 register may be written by
using a 1-bit manipulation instruction.
using these two types of interrupts at the same time, which interrupt occurred can be judged by
checking the fixed-cycle interrupt status flag (RIFG) and the alarm detection status flag (WAFG)
upon INTRTC occurrence.
0
1
0
1
0
1
Figure 7-4. Format of Real-Time Counter Control Register 1 (RTCC1) (2/2)
Constant-period interrupt is not generated.
Constant-period interrupt is generated.
Counter is operating.
Mode to read or write counter value
Sets counter operation.
Stops SEC to YEAR counters. Mode to read or write counter value
CHAPTER 7 REAL-TIME COUNTER
User’s Manual U17854EJ9V0UD
Constant-period interrupt status flag
Wait status flag of real-time counter
Wait control of real-time counter
267
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