UPD78F1142AF1-AN1-A Renesas Electronics America, UPD78F1142AF1-AN1-A Datasheet - Page 551
UPD78F1142AF1-AN1-A
Manufacturer Part Number
UPD78F1142AF1-AN1-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1142AF1-AN1-A
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Company:
Part Number:
UPD78F1142AF1-AN1-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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without via CPU.
between the SFR and internal RAM, and therefore, a large capacity of data can be processed. In addition, real-time
control using communication, timer, and A/D can also be realized.
14.1 Functions of DMA Controller
The 78K0R/KE3 has an internal DMA (Direct Memory Access) controller.
Data can be automatically transferred between the peripheral hardware supporting DMA, SFRs, and internal RAM
As a result, the normal internal operation of the CPU and data transfer can be executed in parallel with transfer
Here are examples of functions using DMA.
Number of DMA channels: 2
Transfer unit: 8 or 16 bits
Maximum transfer unit: 1024 times
Transfer type:
Transfer mode: Single-transfer mode
Transfer request: Selectable from the following peripheral hardware interrupts
• A/D converter
• Serial interface (CIS00, CSI10, UART0, UART1, UART3, or IIC10)
• Timer (channel 0, 1, 4, or 5)
Transfer target: Between SFR and internal RAM
• Successive transfer of serial interface
• Batch transfer of analog data
• Capturing A/D conversion result at fixed interval
• Capturing port value at fixed interval
2-cycle transfer (One transfer is processed in 2 clocks and the CPU stops during that
processing.)
CHAPTER 14 DMA CONTROLLER
User’s Manual U17854EJ9V0UD
549
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