UPD78F1144AF1-BA4-A Renesas Electronics America, UPD78F1144AF1-BA4-A Datasheet - Page 612
UPD78F1144AF1-BA4-A
Manufacturer Part Number
UPD78F1144AF1-BA4-A
Description
MCU 16BIT 78K0R/KX3 64-FBGA
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1144AF1-BA4-A
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 612 of 880
- Download datasheet (6Mb)
Cautions 1. To use the peripheral hardware that stops operation in the STOP mode, and the peripheral
610
2. To stop the internal low-speed oscillation clock in the STOP mode, use an option byte to stop
3. To shorten oscillation stabilization time after the STOP mode is released when the CPU operates
hardware for which the clock that stops oscillating in the STOP mode after the STOP mode is
released, restart the peripheral hardware.
the watchdog timer operation in the HALT/STOP mode (bit 0 (WDSTBYON) of 000C0H = 0), and
then execute the STOP instruction.
with the high-speed system clock (X1 oscillation), temporarily switch the CPU clock to the
internal high-speed oscillation clock before the execution of the STOP instruction.
changing the CPU clock from the internal high-speed oscillation clock to the high-speed system
clock (X1 oscillation) after the STOP mode is released, check the oscillation stabilization time
with the oscillation stabilization time counter status register (OSTC).
CHAPTER 17 STANDBY FUNCTION
User’s Manual U17854EJ9V0UD
Before
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