UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 869
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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24.4 Operation
24.4.1 Reset operation via RESET pin
malfunction caused by noise.
Main clock oscillator (f
Subclock oscillator (f
Internal oscillator
Peripheral clock (f
Internal system clock (f
CPU clock (f
CPU
Watchdog timer 2
RTC
Internal RAM
I/O lines (ports/alternate-function
pins)
On-chip peripheral I/O registers
Other on-chip peripheral functions
When a low level is input to the RESET pin, the system is reset, and each hardware unit is initialized.
When the level of the RESET pin is changed from low to high, the reset status ends.
The RESET pin has an internal noise elimination circuit that uses analog delay (60 ns (TYP.)) to prevent
Notes 1.
Caution The OCDM register is initialized by the RESET pin input. Therefore, note with caution that, if a
Note 1
2.
CPU
high level is input to the P05/DRST pin immediately after a reset ends before the OCDM.OCDM0
bit is cleared, the on-chip debug mode may be entered. For details, see CHAPTER 4 PORT
FUNCTIONS.
)
μ
When the power is turned on, the following pins may output an undefined level temporarily even
during reset.
Item
X
PD70F3792, 70F3793 only.
• P10/ANO0 pin
• P11/ANO1 pin
• P53/SIB2/KR3/TIQ00/TOQ00/RTP03/DDO pin
to f
XT
X
)
X
)
CLK
/1,024)
),
Table 24-1. Hardware Status on RESET Pin Input
Oscillation stops
Oscillation continues
Oscillation stops
Operation stops
Operation stops
Initialized
Operation stops (initialized to 0)
Operation continues
Undefined if power-on reset or CPU access and reset input conflict (data is damaged).
Otherwise value immediately after reset input is retained.
High impedance
Initialized to specified status, OCDM register is set (01H).
Operation stops
CHAPTER 24 RESET FUNCTION
User’s Manual U18953EJ5V0UD
During Reset
Note 2
Oscillation starts
Oscillation starts
Operation starts after securing oscillation
stabilization time
Operation starts after securing oscillation
stabilization time (initialized to f
Program execution starts at address
00000000H after securing oscillation
stabilization time
Counts up from 0 with internal oscillator
clock as source clock.
Operation can be started after securing
oscillation stabilization time
After Reset
XX
/8)
867
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