UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 210
UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(3) Oscillation stabilization time counter status register (OSTC)
208
Remark The oscillation stabilization time counter starts counting in the following cases.
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter.
The X1 clock oscillation stabilization time can be checked in the following case,
OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.
When reset signal is generated, the STOP instruction and MSTOP (bit 7 of CSC register) = 1 clear OSTC to 00H.
• If the X1 clock starts oscillation while the internal high-speed oscillation clock or subsystem clock is being
• If the STOP mode is entered and then released while the internal high-speed oscillation clock is being used
used as the CPU clock.
as the CPU clock with the X1 clock oscillating.
X1 clock
External main system
clock
Subsystem clock
Internal high-speed
oscillation clock
• When oscillation of the X1 clock starts (EXCLK, OSCSEL = 0, 1 → MSTOP = 0)
• When the STOP mode is released
Clock
Table 6-2. Condition Before Stopping Clock Oscillation and Flag Setting
• CLS = 0 and MCS = 0
• CLS = 1
• CLS = 0
• CLS = 0 and MCS = 1
• CLS = 1
(CPU and peripheral hardware clocks operate with a clock
other than the high-speed system clock.)
(CPU and peripheral hardware clocks operate with a clock
other than the subsystem clock.)
(CPU and peripheral hardware clocks operate with a clock
other than the internal high-speed oscillator clock.)
CHAPTER 6 CLOCK GENERATOR
(Invalidating External Clock Input)
User’s Manual U18432EJ5V0UD
Condition Before Stopping Clock
MSTOP = 1
XTSTOP = 1
HIOSTOP = 1
Setting of CSC
Register Flags
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