UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 660
UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Software
Reset
Interrupt
Type
Notes 1.
2.
3.
4.
Priority
Default
debug emulator.
The default priority determines the sequence of interrupts if two or more maskable interrupts occur
simultaneously. Zero indicates the highest priority and 44 indicates the lowest priority.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 17-1.
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
When the instruction code in FFH is executed.
Reset by the illegal instruction execution not issued by emulation with the in-circuit emulator or on-chip
−
−
Note 1
BRK
RESET
POC
LVI
WDT
TRAP
Name
Execution of BRK instruction
RESET pin input
Power-on-clear
Low-voltage detection
Overflow of watchdog timer
Execution of illegal instruction
Table 17-1. Interrupt Source List (3/3)
CHAPTER 17 INTERRUPT FUNCTIONS
Interrupt Source
User’s Manual U18432EJ5V0UD
Trigger
Note 3
Note 4
Internal/
External
−
−
Address
007EH
Vector
0000H
Table
Configuration
Type
Basic
(D)
−
Note 2
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