UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 740
UPD78F1174AGF-GAT-AX
Manufacturer Part Number
UPD78F1174AGF-GAT-AX
Description
MCU 16BIT 78K0R/KX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1174AGF-GAT-AX.pdf
(968 pages)
Specifications of UPD78F1174AGF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
111
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
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Company:
Part Number:
UPD78F1174AGF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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24.3 Format of On-chip Debug Option Byte
738
Address: 000C2H/010C2H
Address: 000C3H/010C3H
Note Be sure to set FFH to 000C2H, as these addresses are reserved areas. Also set FFH to 010C2H when the
The format of on-chip debug option byte is shown below.
Note Set the same value as 000C3H to 010C3H when the boot swap operation is used because 000C3H is
Caution Bits 7 and 0 (OCDENSET and OCDERSD) can only be specified a value.
Remark
boot swap operation is used because 000C2H is replaced by 010C2H.
replaced by 010C3H.
Be sure to set 000010B to bits 6 to 1.
The value on bits 3 to 1 will be written over when the on-chip debug function is in use and thus it will
However, be sure to set the default values (0, 1, and 0) to bits 3 to 1 at setting.
become unstable after the setting.
OCDENSET
OCDENSET
7
1
7
0
0
1
1
Figure 24-4. Format of On-chip Debug Option Byte (000C3H/010C3H)
Note
Note
OCDERSD
Figure 24-3. Format of Option Byte (000C2H/010C2H)
6
1
6
0
0
1
0
1
Disables on-chip debug operation.
Setting prohibited
Enables on-chip debugging.
Erases data of flash memory in case of failures in authenticating on-chip debug
security ID.
Enables on-chip debugging.
Does not erases data of flash memory in case of failures in authenticating on-chip
debug security ID.
CHAPTER 24 OPTION BYTE
5
1
5
0
User’s Manual U18432EJ5V0UD
4
1
4
0
Control of on-chip debug operation
3
1
3
0
2
1
2
1
1
1
1
0
OCDERSD
1
0
0
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