UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 218
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 218 of 1016
- Download datasheet (7Mb)
<R>
78K0R/Lx3
(2) Clock operation status control register (CSC)
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
This register is used to control the operations of the high-speed system clock, internal high-speed oscillation clock,
and subsystem clock (except the 20 MHz internal high-speed oscillation clock and internal low-speed oscillation clock).
CSC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to C0H.
Address: FFFA1H
Symbol
CSC
Caution 1. After reset release, set the clock operation mode control register (CMC) before
HIOSTOP
XTSTOP
MSTOP
MSTOP
<7>
Figure 5-3. Format of Clock Operation Status Control Register (CSC)
0
1
0
1
0
1
After reset: C0H
starting X1 oscillation as set by MSTOP or XT1 oscillation as set by XTSTOP.
X1 oscillator operating
X1 oscillator stopped
XT1 oscillator operating
XT1 oscillator stopped
Internal high-speed oscillator operating
Internal high-speed oscillator stopped
• Keep the wiring length between the XT1 and XT2 pins and resonator as short as
• Configure the circuit board by using material with little parasitic capacitance and
• Place a ground pattern that has the same potential as V
• Do not cross the signal lines between the XT1 and XT2 pins and the resonator
• Moisture absorption by the circuit board and condensation on the board in a
• Coat the surface of the circuit board by using material that does not generate
XTSTOP
possible and parasitic capacitance and wire resistance as small as possible. This
is particularly important when super-low-consumption oscillation (AMPHS1 = 1) is
selected.
wire resistance.
XT1 oscillator.
with other signal lines. Do not route the signal lines near a signal line through
which a high fluctuating current flows.
highly humid environment may cause the impedance between the XT1 and XT2
pins to drop and disable oscillation. When using the circuit board in such an
environment, prevent the circuit board from absorbing moisture by taking
measures such as coating the circuit board.
capacitance or leakage between the XT1 and XT2 pins.
<6>
X1 oscillation mode
XT1 oscillation mode
R/W
5
0
Internal high-speed oscillation clock operation control
High-speed system clock operation control
Subsystem clock operation control
External clock from EXCLK
pin is valid
External clock from EXCLK
pin is invalid
4
0
External clock input mode
3
0
CHAPTER 5 CLOCK GENERATOR
2
0
Input port mode
−
Input port mode
SS
1
0
(if possible) around the
−
HIOSTOP
<0>
218
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