UPD78F1506GF-GAT-AX Renesas Electronics America, UPD78F1506GF-GAT-AX Datasheet - Page 924
UPD78F1506GF-GAT-AX
Manufacturer Part Number
UPD78F1506GF-GAT-AX
Description
MCU 16BIT 78K0R/LX3 128-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Lx3r
Datasheet
1.UPD78F1500GK-GAK-AX.pdf
(1016 pages)
Specifications of UPD78F1506GF-GAT-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LCD, LVD, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0R/Lx3
(3) Serial interface: IICA
Notes 1.
Remark f
SDA0
R01UH0004EJ0401 Rev.4.01
Jul 2, 2010
SCL0
SCL0 clock frequency
Setup time of restart condition
Hold time
Hold time when SCL0 = “L”
Hold time when SCL0 = “H”
Data setup time (reception)
Data hold time (transmission)
Setup time of stop condition
Bus-free time
(T
(a) IICA
A
Stop
condition
2.
= −40 to +85°C, 1.8 V ≤ V
CLK
Parameter
The first clock pulse is generated after this period when the start/restart condition is detected.
The maximum value (MAX.) of t
(acknowledge) timing.
t
: CPU/peripheral hardware clock frequency
BUF
Start
condition
t
HD:STA
t
LOW
Note 2
Note 1
t
HD:DAT
f
t
t
t
t
t
t
t
t
DD
SCL
SU:STA
HD:STA
LOW
HIGH
SU:DAT
HD:DAT
SU:STO
BUF
Symbol
= EV
DD
Fast mode: f
Standard mode: f
≤ 5.5 V, V
HD:DAT
t
HIGH
t
IICA serial transfer timing
SU:DAT
is during normal transfer and a wait state is inserted in the ACK
Conditions
SS
CLK
= EV
≥3.5 MHz,
CLK
t
SS
SU:STA
≥1 MHz
= AVss = 0 V)
CHAPTER 31 ELECTRICAL SPECIFICATIONS
Restart
condition
Standard Mode
MIN.
250
4.7
4.0
4.7
4.0
4.0
4.7
0
0
t
HD:STA
MAX.
3.45
100
High-Speed Mode
MIN.
100
0.6
0.6
1.3
0.6
0.6
1.3
0
0
t
SU:STO
MAX.
400
0.9
Stop
condition
Unit
kHz
μ
μ
μ
μ
ns
μ
μ
μ
s
s
s
s
s
s
s
924
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