SAK-XC2237M-104F40L Infineon Technologies, SAK-XC2237M-104F40L Datasheet - Page 53

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SAK-XC2237M-104F40L

Manufacturer Part Number
SAK-XC2237M-104F40L
Description
IC MCU 16BIT 320KB FLASH 64LQFP
Manufacturer
Infineon Technologies
Series
XC22xxMr
Datasheet

Specifications of SAK-XC2237M-104F40L

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
SAK-XC2237M-104F40L
Manufacturer:
Infineon Technologies
Quantity:
10 000
3.15
The Watchdog Timer is one of the fail-safe mechanisms which have been implemented
to prevent the controller from malfunctioning for longer periods of time.
The Watchdog Timer is always enabled after an application reset of the chip. It can be
disabled and enabled at any time by executing the instructions DISWDT and ENWDT
respectively. The software has to service the Watchdog Timer before it overflows. If this
is not the case because of a hardware or software failure, the Watchdog Timer
overflows, generating a prewarning interrupt and then a reset request.
The Watchdog Timer is a 16-bit timer clocked with the system clock divided by 16,384
or 256. The Watchdog Timer register is set to a prespecified reload value (stored in
WDTREL) in order to allow further variation of the monitored time interval. Each time it
is serviced by the application software, the Watchdog Timer is reloaded and the
prescaler is cleared.
Time intervals between 3.2 μs and 13.4 s can be monitored (@ 80 MHz).
The default Watchdog Timer interval after power-up is 6.5 ms (@ 10 MHz).
3.16
The Clock Generation Unit can generate the system clock signal
from a number of external or internal clock sources:
The programmable on-chip PLL with multiple prescalers generates a clock signal for
maximum system performance from standard crystals, a clock input signal, or from the
on-chip clock source. See also
The Oscillator Watchdog (OWD) generates an interrupt if the crystal oscillator frequency
falls below a certain limit or stops completely. In this case, the system can be supplied
with an emergency clock to enable operation even after an external clock failure.
All available clock signals can be output on one of two selectable pins.
Data Sheet
External clock signals with pad voltage or core voltage levels
External crystal or resonator using the on-chip oscillator
On-chip clock source for operation without crystal/resonator
Wake-up clock (ultra-low-power) to further reduce power consumption
Watchdog Timer
Clock Generation
Section
4.6.2.
XC2000 Family Derivatives / Base Line
53
Functional Description
XC2238M, XC2239M
f
SYS
for the XC223xM
V2.0, 2009-03

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