UPD70F3739GC-UEU-AX Renesas Electronics America, UPD70F3739GC-UEU-AX Datasheet - Page 751
UPD70F3739GC-UEU-AX
Manufacturer Part Number
UPD70F3739GC-UEU-AX
Description
MCU 32BIT V850ES/JX3 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet
1.UPD70F3739GC-UEU-AX.pdf
(889 pages)
Specifications of UPD70F3739GC-UEU-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3739GC-UEU-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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V850ES/JG3
27.4.4 Selection of communication mode
switching to the flash memory programming mode. The FLMD0 pulse is generated by the dedicated flash programmer.
R01UH0015EJ0300 Rev.3.00
Sep 30, 2010
In the V850ES/JG3, the communication mode is selected by inputting pulses (12 pulses max.) to the FLMD0 pin after
The following shows the relationship between the number of pulses and the communication mode.
Note The number of clocks is as follows depending on the communication mode.
Caution
0
8
9
11
12
Other
TXDA0 (output)
FLMD0 Pulse
RESET (input)
FLMD1 (input)
FLMD0 (input)
RXDA0 (input)
When UARTA0 is selected, the receive clock is calculated based on the reset command sent
from the dedicated flash programmer after receiving the FLMD0 pulse.
V
DD
UARTA0
CSIB0
CSIB3
CSIB0 + HS
CSIB3 + HS
RFU
V
V
V
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
SS
SS
SS
SS
SS
SS
Communication Mode
Power on
Figure 27-8. Selection of Communication Mode
released
Reset
Oscillation
stabilized
Communication rate: 9,600 bps (after reset), LSB first
V850ES/JG3 performs slave operation, MSB first
V850ES/JG3 performs slave operation, MSB first
V850ES/JG3 performs slave operation, MSB first
V850ES/JG3 performs slave operation, MSB first
Setting prohibited
Communication
mode selected
(Note)
Flash control command communication
Remarks
CHAPTER 27 FLASH MEMORY
(erasure, write, etc.)
Page 735 of 870
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