UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 20
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 20 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
Internal
memory
Memory
space
External bus interface
General-purpose register
Clock
I/O port (5 V tolerant)
Timer
Real-time output function
10-bit A/D converter
8-bit D/A converter
Serial interface
DMA controller
Interrupt source
Power save function
Reset source
On-chip debugging
Operating power supply voltage
Operating ambient temperature
Package
Notes 1. Including 8 KB of data-only RAM area.
Main clock
Subclock
Internal oscillator
Minimum instruction
execution time
16-bit TAA
16-bit TAB
16-bit TMM
16-bit TMT
Motor control
Watch timer
WDT
2. The figures in parentheses indicate the number of external interrupts that can release STOP mode.
3. Including NMI.
Generic Name
Part Number
Flash memory
RAM
Logical space
External memory area
Note 1
CSIF/UARTC
CSIF/UARTC/I
CSIF
UARTC/I
UARTC/I
USB function
External
Internal
2
2
C
C/CAN
Notes 2, 3
2
C
Address data bus: 16
I/O: 77 (22)
6 channels (including 1 channel used only for interval function)
2 channels
4 channels
6 bits × 1 channel
12 channels
2 channels
2 channels
1 channel
4 channels (transfer target: on-chip peripheral I/O, internal RAM, external memory)
69
64 MB
64 KB
Multiplexed bus
32 bits × 32 registers
(PLL mode: f
Clock through mode: f
f
f
20.8 ns (main clock (f
1 channel
1 channel (functions with combination of TAA and TAB; includes Hi-Z output control function)
1 channel (RTC)
1 channel
1 channel
2 channels
2 channels
−
17 (17)
HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode
RESET pin input, watchdog timer 2 (WDT2), clock monitor (CLM), low-voltage detector (LVI)
MINICUBE
2.85 to 3.6 V
−40 to +85°C
100-pin plastic LQFP (fine pitch) (14 × 14 mm)
XT
R
= 220 kHz (TYP.)
= 32.768 kHz
μ
PD70F3760
Table 1-1. V850ES/JG3-H Product List
256 KB
40 KB
®
, MINICUBE2 supported
X
= 3 to 6 MHz, f
XX
X
) = 48 MHz)
= 3 to 6 MHz (internal: f
2 channels
1 channel
2 channels
2 channels
−
1 channel
17 (17)
69
μ
PD70F3761
XX
384 KB
48 KB
= 24 to 48 MHz (multiplied by 8)
V850ES/JG3-H
XX
2 channels
1 channel
2 channels
2 channels
−
1 channel
17 (17)
69
= 3 to 6 MHz)
μ
PD70F3762
512 KB
56 KB
CHAPTER 1 INTRODUCTION
2 channels
2 channels
1 channel
1 channel
1 channel
1 channel
17 (17)
73
μ
PD70F3770
256 KB
40 KB
Page 20 of 1509
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