UPD70F3765GF-GAT-AX Renesas Electronics America, UPD70F3765GF-GAT-AX Datasheet - Page 515
UPD70F3765GF-GAT-AX
Manufacturer Part Number
UPD70F3765GF-GAT-AX
Description
MCU 32BIT V850ES/JX3-H 128-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Hr
Datasheet
1.UPD70F3760GC-UEU-AX.pdf
(1512 pages)
Specifications of UPD70F3765GF-GAT-AX
Core Processor
RISC
Core Size
32-Bit
Speed
48MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3765GF-GAT-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 515 of 1512
- Download datasheet (9Mb)
V850ES/JG3-H, V850ES/JH3-H
R01UH0042EJ0400 Rev.4.00
Sep 30, 2010
(2) PWM output mode operation timing
(a) Changing pulse width during operation
To change the PWM waveform while the counter is operating, write the TT0CCR1 register last.
Rewrite the TT0CCRn register after writing the TT0CCR1 register after the INTTT0CC1 signal is detected.
To transfer data from the TT0CCRn register to the CCRn buffer register, the TT0CCR1 register must be written.
To change both the cycle and active level of the PWM waveform at this time, first set the cycle to the TT0CCR0
register and then set the active level width to the TT0CCR1 register.
To change only the cycle of the PWM waveform, first set the cycle to the TT0CCR0 register, and then write the
same value (same as preset value of the TT0CCR1 register) to the TT0CCR1 register.
To change only the active level width (duty factor) of the PWM waveform, only the TT0CCR1 register has to be
set.
After data is written to the TT0CCR1 register, the value written to the TT0CCRn register is transferred to the
CCRn buffer register in synchronization with clearing of the 16-bit counter, and is used as the value compared
with the 16-bit counter.
To write the TT0CCR0 or TT0CCR1 register again after writing the TT0CCR1 register once, do so after the
INTTT0CC0 signal is generated. Otherwise, the value of the CCRn buffer register may become undefined
because the timing of transferring data from the TT0CCRn register to the CCRn buffer register conflicts with
writing the TT0CCRn register.
Remark
CCR0 buffer register
CCR1 buffer register
INTTT0CC0 signal
TT0CCR0 register
TT0CCR1 register
TOT01 pin output
16-bit counter
n = 0, 1
TT0CE bit
FFFFH
0000H
D
10
D
D
00
00
D
10
D
D
D
CHAPTER 9 16-BIT TIMER/EVENT COUNTER T (TMT)
10
10
D
00
00
D
10
D
00
D
D
11
01
D
01
D
11
D
D
D
11
01
11
D
01
Page 515 of 1509
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