UPD70F3744GJ-GAE-AX Renesas Electronics America, UPD70F3744GJ-GAE-AX Datasheet - Page 380
UPD70F3744GJ-GAE-AX
Manufacturer Part Number
UPD70F3744GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3r
Datasheet
1.UPD70F3743GJ-GAE-AX.pdf
(911 pages)
Specifications of UPD70F3744GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
32MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
128
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3744GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 380 of 911
- Download datasheet (6Mb)
V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
(c) Generation timing of compare match interrupt request signal (INTTQ0CCk)
CCRk buffer register
The timing of generation of the INTTQ0CCk signal in the PWM output mode differs from the timing of other
INTTQ0CCk signals; the INTTQ0CCk signal is generated when the count value of the 16-bit counter matches
the value of the TQ0CCRk register.
Remark
Usually, the INTTQ0CCk signal is generated in synchronization with the next counting up after the count value
of the 16-bit counter matches the value of the TQ0CCRk register.
In the PWM output mode, however, it is generated one clock earlier. This is because the timing is changed to
match the change timing of the output signal of the TOQ0k pin.
INTTQ0CCk signal
TOQ0k pin output
16-bit counter
Count clock
k = 1 to 3
D
k
− 2
D
k
− 1
CHAPTRER 8 16-bit TIMER/EVENT COUNTER Q (TMQ)
D
D
k
k
D
k
+ 1
D
k
+ 2
Page 364 of 892
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