UPD70F3786GJ-GAE-AX Renesas Electronics America, UPD70F3786GJ-GAE-AX Datasheet - Page 1472
UPD70F3786GJ-GAE-AX
Manufacturer Part Number
UPD70F3786GJ-GAE-AX
Description
MCU 32BIT V850ES/JX3-E 144-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Er
Datasheet
1.UPD70F3778GF-GAT-AX.pdf
(1817 pages)
Specifications of UPD70F3786GJ-GAE-AX
Core Processor
RISC
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, CSI, EBI/EMI, Ethernet, I²C, UART/USART, USB
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
124K x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD70F3786GJ-GAE-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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1470
17
16
10
9
8
2
1
0
Bit
RECI
RXI
TBEMSK
TECMSK
TXMSK
TBEI
TECI
TXI
Name
This bit indicates the occurrence of the reception (DMA) end of chain interrupt. It is cleared when
read.
This bit indicates the occurrence of the packet reception (DMA) completion interrupt. It is cleared
when read.
This bit masks the TEBI interrupt of bit 2.
This bit masks the TBCI interrupt of bit 1.
This bit masks the TXI interrupt of bit 0.
This bit indicates the occurrence of the transmit data buffer access error interrupt. It is cleared
when read.
This bit indicates the occurrence of the transmission (DMA) end of chain interrupt. It is cleared
when read.
This bit indicates the occurrence of the packet transmission (DMA) completion interrupt. It is
cleared when read.
0: Interrupt did not occur.
1: Interrupt occurred.
0: Interrupt does not occur.
1: Interrupt occurs.
0: Interrupt enabled
1: Interrupt masked
0: Interrupt enabled
1: Interrupt masked
0: Interrupt enabled
1: Interrupt masked
0: Interrupt did not occur.
1: Interrupt occurred.
0: Interrupt did not occur.
1: Interrupt occurred.
0: Interrupt did not occur.
1: Interrupt occurred.
CHAPTER 23 ETHERNET CONTROLLER
User’s Manual U19601EJ2V0UD
Description
(2/2)
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